1. Field of the Disclosure
The present disclosure relates to a method of fabricating an array substrate including performing a dry etching process using nitrogen trifluoride (NF3) gas.
2. Discussion of the Related Art
In recent years, with the advent of an information-oriented society, the field of display devices configured to process and display a large amount of information has rapidly been developed. Liquid crystal displays (LCDs) or organic light emitting diodes (OLEDs) have lately been developed as flat panel displays (FPDs) having excellent performance, such as a small thickness, light weight, and low power consumption, and has superseded conventional cathode-ray tubes (CRTs).
Among LCDs, an active matrix (AM)-type LCD including an array substrate having a TFT serving as a switching element capable of controlling on/off voltages of each of pixels may have excellent resolution and capability of embodying moving images.
In addition, since an OLED is an emissive display having high luminance and low operating voltage characteristics, the OLED has a high contrast ratio and may be made ultrathin. Also, the OLED may be easily capable of embodying moving images due to a response time of several microseconds (μs), have an unlimited viewing angle, be stable at a low temperature, and operate at a low direct-current (DC) voltage of about 5 to 15V, thereby facilitating manufacture and design of driver circuits. For the above-described reasons, the OLED has lately attracted much attention as an FPD.
LCDs and OLEDs equally require array substrates including thin-film transistors (TFTs) serving as switching elements to turn respective pixel regions on and off.
FIG. 1 is a cross-sectional view of a conventional array substrate 11 of an LCD or an OLED, which illustrates a TFT formed in one pixel region.
As shown in FIG. 1, a plurality of gate lines (not shown) and a plurality of data lines 33 may be formed on an array substrate 11, and a plurality of pixel regions P are defined by intersection of the gate lines and the data lines 33. A gate electrode 15 may be formed in a switch region TrA of each of the plurality of pixel regions P. Also, a gate insulating layer 18 may be formed on the entire surface of the resultant structure to cover the gate electrode 15, and a semiconductor layer 28 including an active layer 22 formed of pure amorphous silicon (a-Si), and an ohmic contact layer 26 formed of doped a-Si may be sequentially formed on the gate insulating layer 18. A source electrode 36 and a drain electrode 38 may be formed on the ohmic contact layer 26 to correspond to the gate electrode 15, and spaced apart from each other. In this case, the gate electrode 15, the gate insulating layer 18, the semiconductor layer 28, and the source and drain electrodes 36 and 38, which may be sequentially stacked on the switching region TrA, may constitute a TFT Tr.
Furthermore, a protection layer 42 including a drain contact hole 45 exposing the drain electrode 38 may be formed on the entire surface of the resultant structure to cover the source and drain electrodes 36 and 38 and the exposed active layer 22. A pixel electrode 50 may be separately formed in each of pixel regions P on the protection layer 42 and in contact with the drain electrode 38 through the drain contact hole 45.
Fabrication of the array substrate 11 having the above-described construction may involve a mask process.
The mask process may include a plurality of unit processes, such as processes of coating photoresist on a material layer required for a patterning process, exposing the photoresist using an exposure mask, developing the exposed photoresist, etching the material layer, and stripping the photoresist.
For example, the mask process may be performed to pattern the protection layer 42 formed of an inorganic insulating material, and form the drain contact hole 45 for exposing the drain electrode 38 of the TFT Tr.
In general, the protection layer 42 may be formed of an inorganic insulating material, such as silicon nitride (SiNX). The patterning of the protection layer 42 formed of silicon nitride may include performing a dry etching process within a vacuum chamber using a reactive gas. A gas mixture containing sulfur hexafluoride (SF6) gas may be used as the reactive gas for the dry etching process.
However, to prevent global warming, attempts at inhibiting use of gases (hereinafter, referred to as “greenhouse gases”) contributing toward global warming or proposing the amounts of greenhouse gases used have been made.
Specifically, as examples of measures for inhibiting global warming, a greenhouse gas emission trading system will come into effect in 2015, and a greenhouse gas target management system will come into effect in 2012.
However, sulfur hexafluoride gas, which is used as a reactive gas for dry etching silicon nitride (SiNx), has a global warming potential (GWP) of 23,900, and is classified as a greenhouse gas having the highest GWP of greenhouse gases. Here, GWP is a relative measure of global warming caused by greenhouse gases when the GWP of carbon dioxide is standardized to 1.
Accordingly, the use of sulfur hexafluoride is suppressed. When sulfur hexafluoride gas is continuously used and exceeds a decided amount, greenhouse development rights (GDR) corresponding to the excessed amount should be additionally purchased, or the excessed sulfur hexafluoride gas should be reprocessed and modified into a non-greenhouse gas or a gas having a low GWP, and emitted.
To modify sulfur hexafluoride gas into a non-greenhouse gas or a gas having a low GWP, a greenhouse gas reprocessing system, such as a thermal decomposition system, should be additionally prepared, and additional costs may be incurred to operate the system. Therefore, fabrication costs of final products may increase to degrade price competitiveness.
Accordingly, it is necessary to replace sulfur hexafluoride gas with another reactive gas, or reduce the amount of sulfur hexafluoride gas used during a dry etching process for patterning the protection layer 42 formed of silicon nitride.